3.2: HWE.2 Detailed Hardware Design

Process Purpose: Transform architectural design (HWE.1) into detailed hardware design documentation - schematics, PCB layouts, component specifications, design reviews. Establish the blueprint for manufacturing.

Process Overview

Detailed Design Activities

1. Schematic Entry

Process:

• Create schematic from architectural block diagram (HWE.1)
• Include all components, connections, part numbers
• Add design annotations (tolerances, special requirements)
• Include safety/reliability annotations

Example: Microcontroller + Sensor Interface

Microcontroller (STM32H7):
├─ Power supply (5V → 3.3V regulator, 2x 10µF bypass)
├─ Crystal oscillator (8MHz, ±20ppm)
├─ JTAG interface (for debugging)
└─ GPIO for sensor inputs

Temperature Sensor (RTD Pt100):
├─ Excitation current source (10mA)
├─ Signal conditioning (instrumentation amp)
├─ Low-pass filter (10Hz cutoff, anti-aliasing)
└─ ADC input (12-bit, 1% accuracy)

Design Rules:

• [PASS] Decoupling capacitors within 10mm of IC power pins
• [PASS] Analog/digital ground separation with single-point connection
• [PASS] Trace width ≥8mil for power, ≥4mil for signals
• [PASS] Minimum spacing 8mil between traces (safety critical: 12mil)

2. Component Selection

Criteria:

• Functional: Meets electrical requirements (voltage, current, frequency)
• Reliability: MTBF (Mean Time Between Failures) data available
• Availability: Sufficient supply, not end-of-life
• Cost: Within budget constraints
• Supply Chain: Verified supplier, traceability

Component Selection Matrix:

Component: ADC (12-bit, ≥1kHz sampling)

Option 1: SAR ADC (TI ADS1115)
  ├─ Functional: [PASS] 12-bit, 860 SPS
  ├─ Cost: $2.50
  ├─ Availability: [PASS] In stock, multiple suppliers
  └─ MTBF: 800,000 hours
  Verdict: [PASS] SELECTED (best balance)

Option 2: Delta-Sigma ADC (TI ADS1256)
  ├─ Functional: [PASS] 24-bit, slower
  ├─ Cost: $8.00
  ├─ Availability: [PASS] Good
  └─ MTBF: 1,200,000 hours
  Verdict: [WARN] Overkill for 12-bit requirement

Option 3: Analog Devices AD7680
  ├─ Functional: [PASS] 16-bit, ≥2kHz
  ├─ Cost: $5.50
  ├─ Availability: [WARN] Lead time 12 weeks
  └─ MTBF: 950,000 hours
  Verdict: [FAIL] Too risky (supply chain)

3. PCB Layout

Key Tasks:

• Place components to minimize trace lengths
• Route signals respecting EMC/SI (signal integrity) rules
• Separate analog/digital grounds
• Assign power/ground planes
• Include test points for manufacturing

Layer Stackup (4-layer typical):

Layer 1: Signal/Components (top)
  ├─ Microcontroller, sensors, connectors
  └─ Short traces to minimize inductance

Layer 2: Ground Plane (continuous)
  └─ Low impedance return path

Layer 3: Power Plane (continuous)
  └─ Isolated from digital ground

Layer 4: Signal (bottom)
  ├─ Power distribution, long traces
  └─ Power and signal returns

Design Rules (Safety-Critical):

4. Design Review (Formal)

Review Team:

• Hardware designer
• Hardware lead/reviewer
• Manufacturing engineer
• Quality engineer
• (If safety-critical: Safety specialist)

Review Checklist:

□ Schematic completeness
  □ All components have part numbers
  □ All nets are connected (no floating nets)
  □ Power/ground properly distributed

□ Signal integrity
  □ Trace impedance controlled (differential pairs for high-speed)
  □ No crosstalk hotspots
  □ Adequate separation (analog/digital)

□ Thermal design
  □ High-power components have thermal analysis
  □ Heat dissipation path identified
  □ Temperature limits met (worst case)

□ EMC compliance
  □ Filtering on all external connectors
  □ Shielding for sensitive signals
  □ Ferrite beads on power lines

□ Design for Manufacturing (DFM)
  □ Component spacing adequate for pick-and-place
  □ No 0402 resistors (too small, high defect rate)
  □ Solder pad sizes correct (IPC-A-610)
  □ Test points included

□ Testability
  □ JTAG chain accessible
  □ ADC test signals available
  □ Power/ground test points

□ Cost & BOM
  □ Component sourcing verified
  □ Lead times acceptable
  □ Cost estimates realistic

Review Outcome: [PASS] APPROVED or [FAIL] REWORK REQUIRED

Design Analysis

Thermal Analysis

Method: Calculate worst-case temperatures

Component: Microcontroller STM32H7
├─ Power dissipation: 1.5W (at full speed, 240 MHz)
├─ Ambient temperature: 50°C (worst case: automotive)
├─ PCB thermal resistance: 60°C/W (typical, no heatsink)
│
├─ Calculation:
│  T_junction = T_ambient + (P_dissipation × θ_JC)
│           = 50°C + (1.5W × 60°C/W)
│           = 50°C + 90°C
│           = 140°C
│
└─ Verdict: [FAIL] EXCEEDS max (125°C limit)

SOLUTION:
├─ Add thermal via pattern under MCU
├─ Connect to ground plane (lower thermal resistance to 40°C/W)
├─ Recalculate: 50°C + (1.5W × 40°C/W) = 110°C [PASS] ACCEPTABLE

EMC Analysis

EMI Sources:

• High-frequency clocks (240MHz MCU)
• Power supply switching (buck converter)
• Sensor interference

Mitigation:

• [PASS] Crystal oscillator shielded
• [PASS] Ferrite beads on power supply output
• [PASS] 100nF capacitors at each IC power pin
• [PASS] Twisted pair for sensor signals
• [PASS] Star grounding (single point connection)

Design Documentation

Deliverables:

1. Schematic (PDF, high-resolution)
2. PCB Layout (Gerber files for manufacturing)
3. Component List (BOM) with part numbers, suppliers
4. Design Specification (electrical, thermal, mechanical)
5. Test Point List (for manufacturing test)
6. Design Review Report (approval, issues, resolutions)

Summary

HWE.2 Deliverables:

• [PASS] Detailed schematics with all component connections
• [PASS] PCB layout optimized for manufacturing
• [PASS] Component list with sourcing information
• [PASS] Thermal and EMC analysis completed
• [PASS] Design review with formal approval
• [PASS] Ready for PCB fabrication and assembly

Next: HWE.3 (Manufacturing/implementation)